Embodiments disclosed herein relate to a semiconductor device, and particularly, to a refresh circuit and refresh control method of a semiconductor memory device.
In a volatile memory such as dynamic random access memory (DRAM), when time has passed, charge stored in a memory cell gradually decreases and the data initially stored in the memory cell may be changed into another data. Therefore, an operation of charging memory cells of a volatile memory at predetermined periods is typically used. This process is called a refresh operation. Examples of a refresh operation are described in U.S. Pat. No. 5,627,791, which is incorporated herein by reference in its entirety.